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? e93z33-te sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. structure bipolar silicon monolithic ic applications digital cordless telephone of europe (ct-2) description the CXA1744AR is an if amplifier ic designed for digital cordless telephone of europe, ct-2. features mixer, rssi, detector, and various other functions required of a digital cordless phone if amplifier. local oscillator and multiplier for the mixer. low power consumption (8.4ma at 3.0v) small package (48-pin lqfp). absolute maximum ratings (ta=25?) supply voltage v cc 14 v operating temperature topr ?0 to +75 ? storage temperature tstg ?5 to +150 ? allowable power dissipation p d 500 mw recommended operating condition supply voltage v cc 2.7 to 5.5 v if amplifier for digital cordless telephone 48 pin lqfp (plastic) CXA1744AR
? CXA1744AR if mix rssi lim det reg multi comp2 sample rssiost opamp comp1 mixout mixin2 mixin1 bufpas loin ref nc multiout nc nc oscc oscb icompout icompinx icompin detout opin opinx opout dcompin dcompinx dcompout psx mixgnd limout qdin rssiost rssiout regout1 v cc fcompin fcompinx fcompout vref curref gnd rssignd limp2 limin limp1 ifcnt rssivcc ifout sample ifp2 ifin ifp1 mixv cc osc comp3 1 2 3 4 5 6 7 8 9 10 11 12 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 21 22 23 24 13 14 15 16 17 18 20 19 block diagram and pin configuration
? CXA1744AR pin description pin typical pin no. voltage symbol equivalent circuit description 1 mixgnd 0v 2 psx 0v 3 dcompout 4 dcompinx 5 dcompin 6 opout 7 opinx 8 opin 9 detout 1.25v gnd for the mix, osc, and multi circuits. power save control. power save mode for low; power save function executes on all circuits except the osc circuit and a part of the reg circuit. data slicer comparator output. data slicer comparator input. dcompinx is for out-of-phase input. dcompin is for in-phase input. operational amplifier output. operational amplifier input. opinx is for out-of-phase input. opin is for in-phase input. detector output. v cc gnd 32k 32k 2 v cc gnd 3 v cc gnd 129 129 4 5 v cc gnd 129 129 7 8 v cc gnd 6 gnd 9 v cc
? CXA1744AR pin typical pin no. voltage symbol equivalent circuit description 10 icompin 11 icompinx 12 icompout 13 gnd 0v 14 curref 1.25v 15 vref 1.9v 16 fcompout 17 fcompinx 18 fcompin sample-and-hold circuit input. icompin is for in-phase input. icompinx is for out-of-phase input. sample-and-hold circuit output. gnd for circuits other than the mix, osc, multi, and rssi circuits. adjustment for rssi output current. connects a resistor between this pin and gnd. reference voltage. leave this pin open normally. comparator output for free-channel detection. comparator input for free-channel detection. fcompinx is for out-of-phase input. fcompin is for in-phase input. gnd 129 129 10 11 v cc gnd 12 v cc 129 1.25v gnd 14 v cc gnd v cc 16 1.25v gnd 15 v cc gnd 129 129 17 v cc 18
? CXA1744AR pin typical pin no. voltage symbol equivalent circuit description 19 v cc 3.0v 20 regout1 1.25v 21 rssiout 22 rssiost 1.25v 23 qdin 2.45v 24 limout 1.55v 25 rssignd 0v power supply for circuits other than the mix, osc, multi, and rssi circuits. internal bias regulator output. a stabilized bias voltage can be obtained. rssi current output. a voltage output is obtained when a resistor is connected between this pin and gnd. rssi offset adjustment. the offset amount of rssi output current can be adjusted by connecting a resistor between this pin and gnd. detector input. connect a detection discriminator. limiter output. gnd for the if amplifier, limiter and rssi circuits. 1.25v gnd 20 v cc 129 rssiv cc 129 gnd 21 rssiv cc 129 1.9v 22 rssiv cc gnd 24 rssiv cc gnd 32k 23 129
? CXA1744AR pin typical pin no. voltage symbol equivalent circuit description 26 limp2 1.5v 27 limin 28 limp1 29 ifcnt 0.6v 30 rssiv cc 2.45v 31 ifout 1.55v 32 sample 3.0v 33 ifp2 1.55v 34 ifin 35 ifp1 36 mixv cc 3.0v limiter input. input the signal from if amplifier to limin. connect a decoupling capacitor to limp1 and limp2. if amplifier gain adjustment. connect a resistor between this pin and gnd to compensate for the interstage filter insertion loss between the if amplifier and limiter. power supply for the if amplifier, limiter and rssi circuits. connected to the regulator output internally. connect a decoupling capacitor. if amplifier output. sample-and-hold circuit control input. sample mode for open or high; hold mode for low. if amplifier input. input the signal from mix to ifin. connect a decoupling capacitor to ifp1 and ifp2. power supply for the mix, osc, and multi circuits. 50k 50k 460 rssiv cc gnd 28 27 26 gnd 129 rssiv cc 1.9v 29 rssiv cc gnd 420 31 v cc gnd 10k 50k 32 50k 50k 330 rssiv cc gnd 35 34 33 gnd + 1.25v 30 v cc
? CXA1744AR pin typical pin no. voltage symbol equivalent circuit description 37 mixout 1.4v 38 mixin2 1.2v 39 mixin1 42 ref 40 bufpas 1.75v 41 loin 44 multiout 47 oscc 48 oscb 2.75v mixer output. mixer rf signal differential input and bias. connect a decoupling capacitor to ref. mixer local signal input. connect a decoupling capacitor to bufpas. input the local signal to loin. multiplier current output. connect a tank circuit between this pin and power supply. the colpitts-type oscillation circuit is composed by connecting a crystal oscillator. input to the oscc pin when using an external oscillator. mixv cc gnd 290 37 1.5k mixv cc gnd 1.5k 1k 1.25v 38 39 42 mixv cc gnd 2k 2k 1.75v 40 41 mixv cc gnd 44 mixv cc gnd 10k 10k 47 48 det
? CXA1744AR electrical characteristics (v cc =3.0v, ta=25?, refer to the electrical characteristics measurement circuit) item symbol sw set measurement conditions min. typ. max. unit to on current consumption 1 i cc for operating i7 6.4 8.4 11.2 ma v in 7=10mhz, 0dbm current consumption 2 i cc s1 for power saving i7 0.2 0.5 ma v in 7=10mhz, 0dbm v in 5=150.05mhz, -40dbm mixer conversion gain g vmix v in 6=139.35mhz, -10dbm v3 15.5 18 20.5 db rl=330 mixer output resistance r omix 240 330 420 if amp voltage gain gif s10 v in 4=10.7mhz, -60dbm v2 31 33.5 36 db rl=470 if amp input resistance ri if 240 330 420 if amp output resistance r oif 320 440 560 limiter voltage gain g lim v in 3=10.7mhz, -80dbm 24pin 64 66.5 69 db limiter input resistance ri lim 340 460 580 limiter output voltage amplitude v lim v in 3=10.7mhz, -20dbm 24pin 320 400 480 mv p-p rssi output current inclination (if) v in 4=10.7mhz, -30~0dbm i8 0.32 0.4 0.54 ?/db rssi output current inclination (lim) v in 3=10.7mhz, -45~-15dbm i8 0.32 0.4 0.54 ?/db rssi dynamic range drssi for mixin input 75 80 db rssi relative precision ? db rssi output voltage range 0.2 1.3 v detector output voltage v det v in 3=10.7mhz, -20dbm v1 160 200 240 mvrms detector total harmonic distortion thd f mod =36khz, f dev =?5khz v1 3.0 % detector maximum output voltage 1.2 v p-p detector output voltage high level v cc v -1.1 detector output voltage low level 0.5 v reg1 output voltage v reg 1 s9 il=300? 20pin 1.07 1.17 1.27 v comp1 output saturation voltage isat1 s2 v in 1=1.1v, isink=5ma 3pin 0.35 0.5 v comp1 output leak current i leak 1 i1 1.0 ? comp1 input bias current ib1 s3 measured value/2 i2 -200 -70 na s4 comp1 rise time tr1 v in 1=dc level 1.3v 70 200 nsec comp1 fall time tf1 rectangular wave of 100khz, 0.5v p-p 3pin 40 200 nsec comp1 rise propagation delay time t pdr1 rl=1k , cl=20pf 130 500 nsec comp1 fall propagation delay time tpdf1 160 500 nsec comp1 input dynamic range for vref=1.3v 0.3 v cc v
? CXA1744AR item symbol sw set measurement conditions min. typ. max. unit to on comp2 output saturation voltage i sat 2s6v in 2=1.1v, isink=1ma 16pin 0.2 0.4 v comp2 output leak current i leak 2 i5 1.0 ? comp2 input bias current ib2 s7 measured value/2 i6 -200 -70 na s8 comp2 rise time tr2 v in 2=dc level 1.3v 300 500 nsec comp2 fall time tf2 rectangular wave of 100khz, 0.5v p-p 30 500 nsec comp2 rise propagation delay time tpdr2 rl=4.7k , cl=20pf 16pin 200 500 nsec comp2 fall propagation delay time tpdf2 170 500 nsec comp2 input dynamic range for vref=1.3v 0 v cc v opamp input bias range i b measured value/2 i3 -200 -70 na opamp in-phase input voltage range v icm 0.4 v cc v -1.1 opamp output voltage range 0.4 v cc v -1.1 sample-and-hold circuit i leakh s5 100 na high leak current s11 for hold i4 sample-and-hold circuit i leakl s11 -100 na low leak current sample-and-hold circuit 0.8 v control voltage high x v cc sample-and-hold circuit 0.13 v control voltage low x v cc sample-and-hold circuit sample ? hold 12pin 1.2 3.0 ?ec off current time for high output (for s11 off ? on) sample-and-hold circuit s5 sample ? hold 12pin 1.2 3.0 ?ec off current time for low output (for s11 off ? on), vs=1.1v
?0 CXA1744AR design reference values (v cc =3.0v, ta=25?) item symbol conditions min. typ. max. unit multiplier output amplitude v mlt fin=27.87mhz, -10dbm 200 mv p-p 3rd order intercepting point ip3 -8 dbm rf input impedance fin=150.05mhz 145 s11 real component rf input impedance fin=150.05mhz -380 s11 imaginary component mixer noise figure sbb conversion 11 db if amplifier voltage rl=470 , difference to pin 29 open 3 db gain difference (for adjustment) rssi rise time for input signal off/on 30 ?ec rssi fall time for input signal on/off 50 ?ec rssi rise time for burst operation 40 ?ec rssi fall time for burst operation 40 ?ec input sensitivity for mixin input (50 lc matching) 4.5 v (12 db sinad value) (50 lc matching)
?1 CXA1744AR audio measurement circuit 1k 1.3v 120k 0.1 1000p 1000p 100 68k 2k 1p 1000p 62 33k 1000p 1000p 470 62 0.1 100 1000p 1000p 1000p 1000p 1000p 1000p 330 51 51 3.0v 1000p 1000p 1000p 1000p 1000p 1000p CXA1744AR 20p 5ma s4 1.3v 0.3v 1.5v v in1 1.5v vs1 10k 20p 4.7k s6 1ma 1.3v 0.3v s8 v in2 1.5v 100k 300a v in3 0.1 v in5 v in6 1000p v in7 0.3v s5 36k 220p s10 v in4 51 100 * 1 303ac-1941nk (toko) * 1 mixgnd gnd curref vref fcompout fcompinx fcompin v cc regout1 rssiout rssiost qdin limout mixv cc ifp1 ifin ifp2 sample ifout rssiv cc ifcnt limp1 limin limp2 rssignd oscb oscc nc nc multiout nc ref loin bufpas mixin1 mixin2 mixout i 5 i 6 i 7 s9 i 4 i 3 v 1 + i 2 i 1 s2 s3 s1 + + + v 3 + v 2 s11 + psx dcompout dcompinx dcompin detout icompin icompinx icompout opout opinx opin i 8 s7 1 2 3 4 5 6 7 8 9 10 11 12 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 13 14 15 16 17 18 20 21 22 23 24 19 electrical characteristics measurement circuit
?2 CXA1744AR 1000p 1000p 1000p 1000p 1000p 1000p free-ch 2k 1p vcc rssi 10k vcc 120k 100k (68k) 10k 360p 1000p 0.1 100? 0.01 10k 10k 1.3v 1k dataout vcc vcc 100p 84nh 30p c2 30p 56p 1000p + 100? 0.1 1000p vcc vcc 1000p 50k (33k) s2 * 5 r1 50k (36k) + s1 1000p 100k detout 220p r2 if mix r ssi de t reg multi comp2 sample rssiost opamp comp1 c3 1.8? osc 1000p r4 0.1 + 160nh c1 7p 0.4 f , 4d, 6t * 4 * 3 * 2 * 1 * 1 mf x'tal 27.87mhz (asahi) * 2 lqn1 84nh (murata) * 3 sfe10.7mhyk (murata) * 4 sfeca10.7ma5 (murata) * 5 303ac - 1941nk (toko) comp3 r3 2k rfin 1 12 2 3 4 5 6 7 8 9 10 11 aa aa a a a a a a 13 14 15 16 17 18 19 20 21 22 24 25 26 28 29 30 32 33 35 36 38 39 40 41 42 43 44 45 46 47 48 31 li m 27 + 34 37 + 0.1 23 1p application circuit application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
?3 CXA1744AR output level (dbm) rf input level (dbm) mixer input characteristics and 3rd order intercept point local input level vs. mixer conversion gain local input level (dbm) mixer conversion gain (db) audio frequency (hz) output level (db) detector output frequency characteristics limiter input frequency (hz) voltage gain (db) limiter voltage gain frequency characteristics if amplifier voltage gain frequency characteristics if amplifier input frequency (hz) voltage gain (db) rf input frequency (hz) conversion gain (db) mixer conversion gain frequency characteristics -60 -40 -20 0 -60 -40 -20 0 f ld = 139.35mhz, -10dbm f rf1 = 150.05mhz f rf2 = 150.15 mhz 10m 100m 1000m -10 0 10 20 f lo = frf -10.7mhz rf input level = -40dbm lo input level = -10dbm -20 0 20 -60 -40 -20 0 f rf = 150.05mhz -40dbm f lo = 139.35mhz 1m 10m 100m 20 40 60 limiter input level = -80dbm ?0 0 1k 10k 100k f lim = 10.7mhz, -10dbm f dev = 25.4khz 40 20 0 1m 10m 100m if amplifier input level = -60dbm
?4 CXA1744AR 2 3 4 6 supply voltage vs. current consumption current consumption (ma) supply voltage (v) 8 6 4 2 10 0 5 for operating for power saving 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 aaaaa aaaaa aaaaa aaaaa aaaa aaaa aaaa aaaa 1000p sg 29 22 220p 36k 33k 68k f rf = 150.05mhz f lo :built-in osc used rssi output voltage (v) rf input level (dbm) rssi characteristics 21 160nh -20 -40 -60 -80 -100 -120 -140 det output characteristics output level (db) rf input level (dbm) -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 10 0 -10 -20 -30 -40 -50 s+d+n d+n s+d+n n 160nh 1000p sg 39 aaaaaaaaa aaaaaaaaa aaaaaaaaa aaaaaaaaa 39 detout 360p 10k 9 10 f rf = 150.05mhz f dev = 25.4khz f mod = 36khz f lo : built-in osc used +25c ?0c +75c
?5 CXA1744AR description of operation the signals which have been input from pins 38 and 39 are mixed with the local oscillation signal from the oscillator and multiplier at the mixer, and the frequency-converted signal is output from pin 37. the oscillator can be self-oscillated by composing the colpitts-type crystal oscillation circuit between pins 47 and 48. also, the external local oscillation signal can be directly input to pin 47. after the bandwidth is limited by filter, the mixer output signal is amplified by the if amplifier and output from pin 31. the if amplifier output signal is limited its bandwidth again, and the amplitude is limited by the limiter amplifier and output from pin 24. the limiter amplifier output signal is phase-shifted by lc resonance circuit and the signal is output from pin 9 after being quadrature-detected. the rssi output is the currents corresponding to the input level at the if amplifier and limiter amplifier. the current signal can be converted into a voltage signal by connecting a proper i-v conversion circuit to pin 21. notes of operation take care of the followings because the CXA1744AR has the if amplifier voltage gain of approximately 34 db and limiter amplifier voltage gain of approximately 67 db and uses high frequency. 1. use as wide pattern as possible for the power supply line and gnd, and insert a by-pass capacitor as close to them as possible. 2. separate the input line from the output line as far as possible and make the wiring short. 3. ground the decoupling capacitors of mixer (pins 38, 40 and 42), if amplifier (pins 33 and 35) and limiter amplifier (pins 26 and 28) as close to each pin as possible. notes on application 1) power supply this ic has a built-in voltage regulator so that the supply voltage range is wide (2.7 to 5.5 v) and stable. there are three power supply pins and gnd pins (pins 19, 13 and 36, 1 and 30, 25). ground a decoupling capacitor as close to each power supply pin as possible. 2) oscillator the oscillator in this ic varies its current consumption according to the oscillation level. the figures below show how to use the CXA1744AR oscillator. (a) configuring a colpitts oscillation circuit. (b) inputting a local oscillation signal from an external circuit. input a signal of approximately 0 dbm to stabilize the oscillator operation and reduce the current consumption. (a) (b) v cc 47 48 v cc 0dbm 47 48
?6 CXA1744AR 3) multiplier the 5 multiplier is provided in this ic for mixer local signal. the fifth-order component of the input signal is extracted by the resonance circuit connected to pin 44 externally. wire the resonance circuit as close to pin 44 as possible. 4) mixer the CXA1744AR mixer is of double balanced type. its input is at pins 38 and 39; when input from pin 39, pin 38 should be grounded with a capacitor. 5) 10.7 mhz filter the mixer output impedance and if amplifier input impedance are approximately 330 . the if amplifier output impedance and limiter amplifier input impedance are approximately 460 . use the 10.7 mhz filter with matching. 6) detector for quadrature fm detection, the phase of the limiter output (pin 24) is shifted 90 by the rlc parallel resonance circuit or discriminator as the output is input to pin 23. the phase shifter by rlc parallel resonance circuit is shown below. in this case, values of l and c are determined so that the center frequency of the second if signal and the parallel resonance frequency are equal. as the value of r sets the detector output level, select this value so as to obtain the required output level. with regards to the detector input, the center frequency of the second if signal and the frequency for the minimum value of the detector distortion does not match because the internal delay is more than the external one. add the delay circuit as shown below to match the center frequency of the second if signal and the frequency for the minimum value of the detector distortion. delay circuit qdin rssiv cc limout l c r 23 24
?7 CXA1744AR 7) rssi rssi detects the input signal level, and the current is output in this ic. if the voltage output is necessary, i- v conversion should be made by use of a resistor, etc. this ic can compensate for the unevenness of the filter connected between the if amplifier and limiter amplifier. pin 29 is used to perform the adjustment so that the line of the rssi output characteristics is as straight as possible. also, rssi offset adjustment pin (pin 22) is provided in this ic. for example, the rssi offset amount is adjusted to match the dynamic range used in the next-stage ic. 8) comparator this ic has three comparators and they are designed according to the following applications. comp1 performs the waveform shaping of the demodulated audio signal and outputs the resulting signal as a rectangular wave. comp2 is used to detect the free channel or the signal strength after the rssi output voltage is input. comp3 is the current output-type comparator. the comp3 output can be turned on/off by setting pin 32 high/low and this comparator can form a part of a sample-and-hold circuit. the rise time of the demodulated signal during burst operating can be shortened. 9) psx this is the power save control pin (pin 2). the power save function is performed by setting this pin low; the functional blocks except osc are in the power save mode.
sony code eiaj code jedec code package material lead treatment lead material package weight epoxy / phenol resin plating 42/copper alloy package structure 48pin lqfp (plastic) 9.0 0.2 * 7.0 0.1 1 12 13 24 25 36 37 48 (0.22) 0.18 ?0.03 + 0.08 0.5 0.08 (8.0) 0.5 0.2 0.127 ?0.02 + 0.05 0.1 0.1 0.5 0.2 a 1.5 ?0.1 + 0.2 0?to 10 detail a 0.2g lqfp-48p-l01 qfp048-p-0707 0.1 solder/palladium note: * ?dimensions do not include mold protrusion. package outline unit : mm CXA1744AR ?8

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